1. Field of the Invention
The present invention relates to a bias circuit for a control input of a power transistor especially in a power amplifier circuit.
2. Description of the Related Art
FIG. 12 is a schematic block diagram showing a prior art portable telephone.
In a case where speech is transmitted, the speech is sampled and digitized in a speech processing circuit 10, subjected to diffusion modulation in a base band circuit 11, then to orthogonal modulation in an IF & RF circuit 12 using an intermediate frequency and further converted into RF frequencies, and provided as an RF input power RFIN to a power amplifier circuit 14 of an RF front-end circuit 13. The RF output power RFOUT of the power amplifier circuit 14 is provided through a duplexer 15 to an antenna 16.
A signal received by the antenna 16 is provided through the duplexer 15 to a low noise amplifier 17 and the signal is processed reversely to the above case in the IF & RF circuit 12, the base band circuit 11 and the speech processing circuit 10, and speech is thus reproduced.
FIG. 13 shows a diagram of a prior art power amplifier circuit 14 in FIG. 12.
In a power transistor Q0, the emitter is grounded and the collector is connected through an RF cut-off coil L0 to a power supply potential VCC0. To the base of the power transistor Q0, on one hand, the RF input power RFIN, which is a high frequency digital modulation signal, is provided and on the other hand, a base bias current IB0 that determines an operating point is provided through the emitter of a transistor Q1 of a Q0 bias circuit 20 and a coil L1. The coil L1 is employed for prevention of the RF input power RFIN from being transmitted to the Q0 bias circuit 20 and small part of an RF signal that have passed through the RF coil L1 will be absorbed in a capacitor C1. An RF output power RFOUT obtained by power amplification of the RF input power RFIN is taken out from the collector of the power transistor Q0.
In the transistor Q1, the collector is connected to a power supply potential VCC1, the base is connected to the output of a Q1 bias circuit 30 and the emitter is connected through a resistor R1 to a ground line. In order to compensate a temperature drift in the transistor Q1 and the power transistor Q0, the PN junction between the base and emitter of transistor Q2 is serially connected to that of a transistor Q3 in a corresponding manner to a serial connection of the PN junction between the base and emitter of the transistor Q1 to that of the transistor Q0. Since forward saturation voltage of PN junction is about 1.3V, the base potential of the transistor Q1 is about 2.6V. Increase in base bias current IB0 when temperature rises is suppressed since a voltage between the base and emitter of each of the transistors Q2 and Q3 falls and thereby the base potential of the transistor Q1 falls. Resistors R2 and R3 have bias resistances for the transistors Q2 and Q3, respectively.
A portable telephone requires reduction of RF output power depending on a communication state in order to decrease power consumption and besides, requires prevention of deterioration in a tone quality. Hence, high power efficiency and high linearity in operating the power transistor Q0 are required in a broad power range. An operating point is set to the AB class in order to meet requirements for high efficiency and high linearity, which is inherently incompatible with each other.
As the amplitude of the RF input power RFIN increases, the collector bias current IC0 of the power transistor Q0 increases, and proportionally to this the base bias current IB0 of the power transistor Q0 also increases. The emitter current IE1 of the transistor Q1 increases with increase in the current IB0, and the voltage VBE1 between the base and emitter of the transistor Q1 also rises. Therefore, the base bias voltage of the power transistor Q0 falls. For example, when the base bias current IB0 increases by a factor of about 10, the voltage falls by several tens of mV, so that the operating point of the power transistor Q0 which has been set so as to optimize power efficiency and linearity is deviated toward deterioration.
In order to prevent such deterioration, the variation rate of the current IE1=I1+IB0 is reduced by decreasing the resistance value of the resistor R1 and in turn increasing the current I1 which flows through the resistor R1 so as to be large as compared with the base bias current IB0, resulting in suppressing the falling of the voltage VBE1 between the base and emitter of the transistor Q1. However, since there is a necessity to provide a comparative large current I1, which does not contribute to RF amplification, to the resistor R1, power efficiency is worsened.
FIG. 14 shows another prior art power amplifier circuit 14A.
In a Q0 bias circuit 20A of the circuit 14A, a transistor Q4 in diode connection is employed as a constant voltage source instead of the resistor R1 of FIG. 13. In order to suppress the change in voltage within tens of mV by the transistor Q4, however, it is necessary to reduce the change in current density through the PN junction, which entails a larger size of the transistor Q4. Hence, the chip area of a semiconductor integrated circuit including the Q0 bias circuit 20A and the power transistor Q0 increases and in turn, a product cost rises.
If, in order to avoid deterioration of linearity when the RF output power is in the maximum amplitude, the base bias voltage of the transistor Q1 is set high, amplification of the power transistor Q0 becomes close to the A class when the amplitude is small, resulting in reducing efficiency.
In a case where a PNP transistor or an enhancement FET is employed as a power transistor, a problem similar to the above described occurs.
Further, JP 59-18275A discloses a voltage regulator circuit, in a power source for a thermal printing head, for suppressing a fall in power supply voltage caused by increase in an output current by means of employing a resistor through which the output current flows and performing feed-back control so that the voltage of the resistor may keep at a given value. However, this circuit is complex, working for the output current of about 10A, and not suitable for the purpose to suppress the change in the base bias voltage by tens of mV with a simple configuration.